Abstract: A semiconductor device includes a transistor that has: a drift region of a first conductivity type in a semiconductor substrate having a first main surface; a body region of a second conductivity type between the drift region and the first main surface; trenches in the first main surface and patterning the semiconductor substrate into mesas including a first mesa and a dummy mesa, the trenches including an active trench and a dummy trenches arranged in a row; a gate electrode arranged in the active trench; and a source region of the first conductivity type in the first mesa. The first mesa is arranged adjacent to the active trench. The dummy mesa is arranged between each adjacent pair of the dummy trenches and does not include a source region.

Abstract: A semiconductor die includes: a semiconductor substrate; a power transistor formed in the semiconductor substrate; a current sense device formed in the semiconductor substrate and occupying less area of the semiconductor substrate than the power transistor; a first contact pad electrically connected to a first load terminal of the power transistor; a second contact pad electrically connected to a sense terminal of the current sense device, the second contact pad being dedicated to current sensing only; and a resistive and/or diodic connection between the sense terminal of the current sense device and the first load terminal of the power transistor. The resistive and/or diodic connection is designed solely for ESD (electrostatic discharge) protection of the current sense device, by providing an ESD discharge path to the first load terminal of the power transistor.

Abstract: A semiconductor device includes a transistor that has: a drift region of a first conductivity type in a semiconductor substrate having a first main surface; a body region of a second conductivity type between the drift region and the first main surface; a plurality of trenches in the first main surface and patterning the semiconductor substrate into a plurality of mesas including a first mesa and a plurality of dummy mesas, the plurality of trenches including an active trench and a plurality of dummy trenches arranged in a row; a gate electrode arranged in the active trench; and a source region of the first conductivity type in the first mesa. The first mesa is arranged adjacent to the active trench. A dummy mesa is arranged between each adjacent pair of the dummy trenches. The dummy mesas do not carry load current during an on-state of the transistor.

Abstract: A power diode includes a semiconductor body having an anode region and a drift region, the semiconductor body being coupled to an anode metallization of the power diode and to a cathode metallization of the power diode, and an anode contact zone and an anode damage zone, both implemented in the anode region, the anode contact zone being arranged in contact with the anode metallization, and the anode damage zone being arranged in contact with and below the anode contact zone, wherein fluorine is included within each of the anode contact zone and the anode damage zone at a fluorine concentration of at least 1016 atoms*cm-3.

Abstract: A semiconductor device is proposed. The semiconductor device includes trenches extending into a semiconductor body from a first main surface. A first group of the trenches includes a gate electrode. A second group of the trenches includes a source electrode, the source electrode being subdivided into at least a first part and a second part. A conductance per unit length of the first part along a longitudinal direction of the source electrode is smaller than a conductance per unit length of the second part along the longitudinal direction of the source electrode, the second part being electrically coupled to a source contact area via the first part. A mesa region bounded by a trench of the first group and a trench of the second group includes a source region electrically connected to the source contact area.

Abstract: A power semiconductor device is proposed. The power semiconductor device includes a semiconductor substrate having first and second main surfaces arranged opposite to each other. The semiconductor substrate includes an insulated gate bipolar transistor area (IGBT) area including an IGBT, and a diode area including a diode. The diode area includes a cathode region of a first conductivity type and an auxiliary region of a second conductivity type both adjoining to the second main surface of the semiconductor substrate. The cathode region adjoins to the auxiliary region along a first lateral direction. The IGBT area includes a collector region of the second conductivity type at the second main surface of the substrate. The collector region includes a first collector sub-region and a second collector sub-region adjoining to each other along the first lateral direction. The first collector sub-region has a larger maximum doping concentration than the second collector sub-region.

Abstract: A semiconductor device includes a semiconductor substrate, a TiW layer arranged on the semiconductor substrate a Ti layer arranged on the TiW layer, a Ni alloy layer arranged on the Ti layer, and an Ag layer arranged on the Ni alloy layer, wherein the Ag layer and the Ni alloy layer comprise side faces fabricated by at least one wet etching process, and wherein the Ti layer and the TiW layer comprise side faces fabricated by a dry etching process.

Abstract: A semiconductor device is proposed. The semiconductor device includes a plurality of trenches extending into in a semiconductor body from a first main surface. A first group of the plurality of trenches includes a gate electrode. A second group of the plurality of trenches includes a source electrode. A third group of the plurality of trenches includes an auxiliary electrode. The source electrode is electrically coupled to a source contact area via a source wiring line and the auxiliary electrode. The source wiring line and the auxiliary electrode are electrically connected in series between the source contact area and the source electrode.

Abstract: A reverse conducting insulated gate bipolar transistor (RC-IGBT) includes an active area in a semiconductor body. The active area includes an IGBT area, a diode area, a transition area laterally adjacent to the diode area, trenches extending into the semiconductor body from a first surface of the semiconductor body, and a drift region of a first conductivity type that includes lifetime killing impurities in the transition area. The active area further includes a barrier region of the first conductivity type between the drift region and the first surface. A maximum doping concentration in the barrier region is at least 100 times larger than an average doping concentration in the drift region. The barrier region laterally extends through at least part of the transition area, and laterally ends in or before the diode area. The RC-IGBT further includes an edge termination area at least partly surrounding the active area.

Abstract: A power semiconductor device includes: a drift region; a plurality of IGBT cells each having a plurality of trenches extending into the drift region along a vertical direction and laterally confining at least one active mesa which includes an upper section of the drift region; and an electrically floating barrier region of an opposite conductivity type as the drift region and spatially confined, in and against the vertical direction, by the drift region. A total volume of all active mesas is divided into first and second shares, the first share not laterally overlapping with the barrier region and the second share laterally overlapping with the barrier region. The first share carries the load current at least within a range of 0% to 100% of a nominal load current. The second share carries the load current if the load current exceeds at least 0.5% of the nominal load current.

Abstract: A method for fabricating a semiconductor device comprises depositing a TiW layer on a semiconductor substrate, depositing a Ti layer on the TiW layer, depositing a Ni alloy layer on the Ti layer, depositing an Ag layer on the Ni alloy layer, at least partially covering the Ag layer with photoresist, wet etching the Ag layer and the Ni alloy layer, and dry etching the Ti layer and the TiW layer.

Abstract: A reverse conducting insulated gate bipolar transistor (RC-IGBT) includes an active area in a semiconductor body. The active area includes an IGBT area, a diode area, a transition area laterally adjacent to the diode area, trenches extending into the semiconductor body from a first surface of the semiconductor body, and a drift region of a first conductivity type that includes lifetime killing impurities in the transition area. The active area further includes a barrier region of the first conductivity type between the drift region and the first surface. A maximum doping concentration in the barrier region is at least 100 times larger than an average doping concentration in the drift region. The barrier region laterally extends through at least part of the transition area, and laterally ends in or before the diode area. The RC-IGBT further includes an edge termination area at least partly surrounding the active area.

Abstract: A power semiconductor device includes: first and second trenches extending from a surface of a semiconductor body along a vertical direction and laterally confining a mesa region along a first lateral direction; source and body regions in the mesa region electrically connected to a first load terminal; and a first insulation layer having a plurality of insulation blocks, two of which laterally confine a contact hole. The first load terminal extends into the contact hole to contact the source and body regions at the mesa region surface. A first insulation block laterally overlaps with the first trench. A second insulation block laterally overlaps with the second trench. The first insulation block has a first lateral concentration profile of a first implantation material of the source region along the first lateral direction that is different from a corresponding second lateral concentration profile for the second insulation block.

Abstract: A diode is proposed. The diode includes: a semiconductor body having opposing first and second main surfaces; an anode region and a cathode region, the anode region being arranged between the first main surface and the cathode region; an anode pad area electrically connected to the anode region; and trenches extending into semiconductor body from the first main surface. A first group of the trenches includes a first trench electrode. The first trench electrode is subdivided into at least a first part and a second part. A conductance per unit length of the first part along a longitudinal direction of the first trench electrode is by at least a factor of 1000 smaller than a conductance per unit length of the second part along the longitudinal direction of the first trench electrode. The second part is electrically coupled to the anode pad area via the first part.

Abstract: A power semiconductor device includes: a semiconductor body; a control electrode at least partially on or inside the semiconductor body; elevated source regions in the semiconductor body adjacent to the control electrode; recessed body regions adjacent to the elevated source regions; and a dielectric layer arranged on a portion of a surface of the semiconductor body and defining a contact hole. The contact hole is at least partially filled with a conductive material establishing an electrical contact with at least a portion of the elevated source regions and at least a portion of the recessed body regions. At least one first contact surface between at least one elevated source region and the dielectric layer extends in a first horizontal plane. At least one second contact surface between at least one recessed body region and the dielectric layer extends in a second horizontal plane located vertically below the first horizontal plane.

Abstract: A diode is proposed. The diode includes a semiconductor body having a first main surface and a second main surface opposite to the first main surface. The diode further includes an anode region and a cathode region. The anode region is arranged between the first main surface and the cathode region. An anode pad area is electrically connected to the anode region. The diode further includes a plurality of trenches extending into the semiconductor body from the first main surface. A first group of the plurality of trenches includes a first trench electrode. A second group of the plurality of trenches includes a second trench electrode. The first trench electrode is electrically coupled to the anode pad area via an anode wiring line and the second trench electrode.

Abstract: A semiconductor component includes a semiconductor body having opposing first surface and second surfaces, and a side surface surrounding the semiconductor body. The semiconductor component also includes an active region including a first semiconductor region of a first conductivity type, which is electrically contacted via the first surface, and a second semiconductor region of a second conductivity type, which is electrically contacted via the second surface. The semiconductor component further includes an edge termination region arranged in a lateral direction between the first semiconductor region of the active region and the side surface, and includes a first edge termination structure and a second edge termination structure. The second edge termination structure is arranged in the lateral direction between the first edge termination structure and the side surface and extends from the first surface in a vertical direction more deeply into the semiconductor body than the first edge termination structure.

Abstract: A chip includes a semiconductor body coupled to a first and a second load terminal. The semiconductor body includes an active region including a plurality of breakthrough cells, each of the breakthrough cells includes: an insulation structure; a drift region; an anode region, the anode region being electrically connected to the first load terminal and disposed in contact with the first load terminal; a first barrier region arranged in contact with each of the anode region and the insulation structure, where the first barrier region of the plurality of breakthrough cells forms a contiguous semiconductor layer; a second barrier region separating each of the anode region and at least a part of the first barrier region from the drift region; and a doped contact region arranged in contact with the second load terminal, where the drift region is positioned between the second barrier region and the doped contact region.

Abstract: A power diode includes a semiconductor body having an anode region and a drift region, the semiconductor body being coupled to an anode metallization of the power diode and to a cathode metallization of the power diode, and an anode contact zone and an anode damage zone, both implemented in the anode region, the anode contact zone being arranged in contact with the anode metallization, and the anode damage zone being arranged in contact with and below the anode contact zone, wherein fluorine is included within each of the anode contact zone and the anode damage zone at a fluorine concentration of at least 1016 atoms*cm-3.

Abstract: An insulated gate bipolar transistor (IGBT) is proposed. The IGBT includes a semiconductor body having a first surface and a second surface. The IGBT further includes an active area and an edge termination area that at least partly surrounds the active area. The active area includes a first part of an active IGBT area and a second part of the active IGBT area. The IGBT further includes a contact on the second surface of the semiconductor body. A minimum vertical distance between the contact in the first part of the active IGBT area and a reference level at the first surface is larger than a minimum vertical distance between the contact in the second part of the active IGBT area and the reference level at the first surface.