Patents by Inventor Jae-Woo Ryu

Jae-Woo Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12024789
    Abstract: Methods for forming single crystal silicon ingots with improved resistivity control and, in particular, methods that involve gallium or indium doping are disclosed. In some embodiments, the ingots are characterized by a relatively high resistivity.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: July 2, 2024
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Richard J. Phillips, Parthiv Daggolu, Eric Gitlin, Robert Standley, HyungMin Lee, Nan Zhang, Jae-Woo Ryu, Soubir Basak
  • Patent number: 11680336
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: June 20, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Patent number: 11680335
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: June 20, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Publication number: 20210363658
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Application
    Filed: August 4, 2021
    Publication date: November 25, 2021
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Publication number: 20210363657
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Application
    Filed: August 4, 2021
    Publication date: November 25, 2021
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Patent number: 11111597
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: September 7, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Patent number: 11111596
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: September 7, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Publication number: 20210079553
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Application
    Filed: September 13, 2019
    Publication date: March 18, 2021
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Publication number: 20210079554
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Application
    Filed: September 13, 2019
    Publication date: March 18, 2021
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Publication number: 20210071315
    Abstract: Methods for forming single crystal silicon ingots with improved resistivity control and, in particular, methods that involve gallium or indium doping are disclosed. In some embodiments, the ingots are characterized by a relatively high resistivity.
    Type: Application
    Filed: October 15, 2020
    Publication date: March 11, 2021
    Inventors: Richard J. Phillips, Parthiv Daggolu, Eric Gitlin, Robert Standley, HyungMin Lee, Nan Zhang, Jae-Woo Ryu, Soubir Basak
  • Patent number: 10920337
    Abstract: Methods for forming single crystal silicon ingots with improved resistivity control and, in particular, methods that involve gallium or indium doping are disclosed. In some embodiments, the ingots are characterized by a relatively high resistivity.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: February 16, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Richard J. Phillips, Parthiv Daggolu, Eric Gitlin, Robert Standley, HyungMin Lee, Nan Zhang, Jae-Woo Ryu, Soubir Basak
  • Patent number: 10707093
    Abstract: The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: July 7, 2020
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: Young Jung Lee, Jae-Woo Ryu, Byung Chun Kim, Robert J. Falster, Soon Sung Park, Tae Hoon Kim, Jun Hwan Ji, Carissima Marie Hudson
  • Patent number: 10513796
    Abstract: An method for producing a silicon ingot includes melting polycrystalline silicon in a crucible enclosed in a vacuum chamber to form a melt, generating a cusped magnetic field within the vacuum chamber, dipping a seed crystal into the melt, withdrawing the seed crystal from the melt to pull a single crystal that forms the silicon ingot, wherein the silicon ingot has a diameter greater than about 150 millimeters (mm), and simultaneously regulating a plurality of process parameters such that the silicon ingot has an oxygen concentration less than about 5 parts per million atoms (ppma). The plurality of process parameters include a wall temperature of the crucible, a transport of silicon monoxide (SiO) from the crucible to the single crystal, and an evaporation rate of SiO from the melt.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: December 24, 2019
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Soubir Basak, Carissima Marie Hudson, Gaurab Samanta, Jae-Woo Ryu, Hariprasad Sreedharamurthy, Kirk D. McCallum, HyungMin Lee
  • Patent number: 10453703
    Abstract: The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: October 22, 2019
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: Young Jung Lee, Jae-Woo Ryu, Byung Chun Kim, Robert J. Falster, Soon Sung Park, Tae Hoon Kim, Jun Hwan Ji, Carissima Marie Hudson
  • Publication number: 20190267251
    Abstract: The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.
    Type: Application
    Filed: May 9, 2019
    Publication date: August 29, 2019
    Inventors: Young Jung Lee, Jae-Woo Ryu, Byung Chun Kim, Robert J. Falster, Soon Sung Park, Tae Hoon Kim, Jun Hwan Ji, Carissima Marie Hudson
  • Publication number: 20180237938
    Abstract: An method for producing a silicon ingot includes melting polycrystalline silicon in a crucible enclosed in a vacuum chamber to form a melt, generating a cusped magnetic field within the vacuum chamber, dipping a seed crystal into the melt, withdrawing the seed crystal from the melt to pull a single crystal that forms the silicon ingot, wherein the silicon ingot has a diameter greater than about 150 millimeters (mm), and simultaneously regulating a plurality of process parameters such that the silicon ingot has an oxygen concentration less than about 5 parts per million atoms (ppma). The plurality of process parameters include a wall temperature of the crucible, a transport of silicon monoxide (SiO) from the crucible to the single crystal, and an evaporation rate of SiO from the melt.
    Type: Application
    Filed: April 23, 2018
    Publication date: August 23, 2018
    Inventors: Soubir Basak, Carissima Marie Hudson, Gaurab Samanta, Jae-Woo Ryu, Hariprasad Sreedharamurthy, Kirk D. McCallum, HyungMin Lee
  • Publication number: 20180182641
    Abstract: The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 28, 2018
    Inventors: Young Jung Lee, Jae-Woo Ryu, Byung Chun Kim, Robert Falster, Soon Sung Park, Tae Hoon Kim, Jun Hawn Ji, Carissima Marie Hudson
  • Publication number: 20180179660
    Abstract: Methods for forming single crystal silicon ingots with improved resistivity control and, in particular, methods that involve gallium or indium doping are disclosed. In some embodiments, the ingots are characterized by a relatively high resistivity.
    Type: Application
    Filed: December 27, 2017
    Publication date: June 28, 2018
    Inventors: Richard J. Phillips, Parthiv Daggolu, Eric Gitlin, Robert Standley, HyungMin Lee, Nan Zhang, Jae-Woo Ryu, Soubir Basak
  • Patent number: 9951440
    Abstract: An method for producing a silicon ingot includes melting polycrystalline silicon in a crucible enclosed in a vacuum chamber to form a melt, generating a cusped magnetic field within the vacuum chamber, dipping a seed crystal into the melt, withdrawing the seed crystal from the melt to pull a single crystal that forms the silicon ingot, wherein the silicon ingot has a diameter greater than about 150 millimeters (mm), and simultaneously regulating a plurality of process parameters such that the silicon ingot has an oxygen concentration less than about 5 parts per million atoms (ppma). The plurality of process parameters include a wall temperature of the crucible, a transport of silicon monoxide (SiO) from the crucible to the single crystal, and an evaporation rate of SiO from the melt.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: April 24, 2018
    Assignee: SunEdison Semiconductor Limited
    Inventors: Soubir Basak, Carissima Marie Hudson, Gaurab Samanta, Jae-Woo Ryu, Hariprasad Sreedharamurthy, Kirk D. McCallum, HyungMin Lee
  • Patent number: 9324273
    Abstract: An organic light emitting display capable of improving data charging time, includes pixels at crossing regions between scan and data lines and configured to control an amount of current supplied from a first to a second power source, a charge unit adjacent to an adjacent pixel of the pixels and coupled to the same data line as the adjacent pixel, a scan driver for supplying scan signals to the scan lines, a data driver for supplying data signals to the data lines in synchronization with the scan signals, and a comparison unit in a channel of the data driver to compare a data signal supplied to a current line with a data signal supplied to a previous line and to control coupling between the charge unit and the data line according to a comparison result in a partial period of a period in which the scan signals are supplied.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: April 26, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jae-Woo Ryu